Thin edge carrier ring

ABSTRACT

A PECVD deposition chamber with a circular pedestal with a recessed portion in the outer top surface of the pedestal. A PECVD deposition chamber with a circular wafer carrier ring with a recessed portion in the outer top surface of the wafer carrier ring.

FIELD OF THE INVENTION

This invention relates to the field of integrated circuit processing.More particularly, this invention relates thin film PECVD deposition.

BACKGROUND OF THE INVENTION

During the manufacturing of an integrated circuit a number of dielectricfilms may be deposited. One technique used to deposit dielectric filmsat temperatures less than approximately 550 C is PECVD (plasma-enhancedchemical vapor deposition). Some PECVD tools are single wafer toolswhich a deposit dielectric thin film onto one wafer at a time. Oneimportant deposition criteria for the dielectric thin film is thicknessuniformity across the wafer including the edges of the wafer. In orderto provide uniform thickness out to and including the edges of a waferthe deposition may extend beyond the wafer edge. In PECVD depositionprocesses using pressures greater than about 12 Torr, a ring ofdeposited dielectric (also called a deposition fence) may form justoutside the edge of the wafer on the pedestal or the wafer carrier ringupon which the wafer is positioned. The deposition fence typicallypresents a particle problem when the thickness builds up afterdielectric deposition upon multiple wafers. The deposition fence maypeel due to accumulated film stress or the deposition fence may becomesufficiently thick to come into contact with the robot slider whichtransfers wafers into and out of the chamber. When the robot slidercomes into contact with the deposition fence, pieces of the depositionfence may break off and redeposit on the wafer resulting in depressedyield.

Several methods have been developed to deal with the deposition fence.One method is to open the chamber and remove the deposition fence aftera specified number of wafers have been processed. Another method is toperiodically run a plasma clean step such as a NF3 plasma step to etchaway the dielectric fence. Both solutions reduce the time that thedeposition tool is available for manufacturing thus increasingmanufacturing cost.

SUMMARY OF THE INVENTION

The following presents a simplified summary in order to provide a basicunderstanding of one or more aspects of the invention. This summary isnot an extensive overview of the invention, and is neither intended toidentify key or critical elements of the invention, nor to delineate thescope thereof. Rather, the primary purpose of the summary is to presentsome concepts of the invention in a simplified form as a prelude to amore detailed description that is presented later.

A PECVD deposition chamber with a circular pedestal with a recessedportion in the outer top surface of the pedestal. A PECVD depositionchamber with a circular wafer carrier ring with a recessed portion inthe outer top surface of the wafer carrier ring.

DESCRIPTION OF THE VIEWS OF THE DRAWING

FIG. 1 is a cross-section of a PECVD deposition chamber illustrating thedeposition plasma.

FIG. 2. is a cross-section of a PECVD deposition chamber illustrating adeposition fence.

FIG. 3 is a cross-section of a PECVD deposition chamber with a wafercarrier ring formed according to embodiments.

FIGS. 4A and 4B are a top down view and cross-sectional illustrations ofa wafer carrier ring.

FIGS. 5A and 5B are a top down view and a cross-sectional illustrationof a wafer carrier ring formed according to embodiments.

DETAILED DESCRIPTION

The present invention is described with reference to the attachedfigures, wherein like reference numerals are used throughout the figuresto designate similar or equivalent elements. The figures are not drawnto scale and they are provided merely to illustrate the invention.Several aspects of the invention are described below with reference toexample applications for illustration. It should be understood thatnumerous specific details, relationships, and methods are set forth toprovide an understanding of the invention. One skilled in the relevantart, however, will readily recognize that the invention can be practicedwithout one or more of the specific details or with other methods. Inother instances, well-known structures or operations are not shown indetail to avoid obscuring the invention. The present invention is notlimited by the illustrated ordering of acts or events, as some acts mayoccur in different orders and/or concurrently with other acts or events.Furthermore, not all illustrated acts or events are required toimplement a methodology in accordance with the present invention.

Single wafer PECVD dielectric deposition tools come in a variety ofdesigns. A dielectric tool may have a single chamber which processes asingle wafer at a time or may have multiple chambers. A dielectric toolmay also have a single chamber with multiple deposition stations forprocessing multiple wafers at a time. Multiple deposition stations mayprovide a more uniform film thickness by averaging out depositionnonuniformity that may occur in one of the deposition stations. In amulti-station deposition tool the wafer typically is placed on a carrierring which transports the wafer from station to station.

The inside of a typical multi-station, single wafer deposition chamberis shown in FIG. 1. Wafer 1008 sits atop pedestal 1004. Carrier ring,1006, which is used to transport the wafer from one deposition stationto the next, surrounds the wafer 1008 providing an extended surfacebeyond the edge of the wafer. This extended surface facilitates uniformthin film deposition out to and including the edge of the wafer 1008.Reactants are dispensed from top electrode and showerhead, 1010, intothe plasma 1012 and recombine at the plasma 1012/wafer 1008 interface todeposit dielectric on the wafer 1008 and recombine along the plasma edge1016/chamber ambient interface to form a dielectric fence 1014 on thewafer carrier ring 1006. The deposition fence 1014 may increase inthickness as additional wafers are processed.

As is illustrated in FIG. 2, the deposition fence 2014 may build up to athickness where the robot slider 2018 which transports wafers into andout of the chamber, comes into contact with the deposition fence causingpieces of the deposition fence, 2014, to be broken off resulting inparticles that may redeposit on wafer 2008 and depress yield.

An embodiment is illustrated in FIG. 3 which addresses the depositionfence problem. Pedestal 3004 has a central region 3005 surrounded by anouter region 3003, which is recessed with respect to central region3005. Carrier ring 3006 surrounds central region 3005 and sits overouter region 3003 of pedestal 3004. Carrier ring 3006 includes a centralregion 3007, which surrounds and has an upper surface that issubstantially coplanar with the upper surface of central region 3005 ofpedestal 3004, a second region 3008, which surrounds central region 3007and has an upper surface that is substantially coplanar with the uppersurface of wafer 3010 when wafer 3010 is positioned on regions 3005 and3007, and a third or outer region 3009, which surrounds and is recessedwith respect to region 3008. Reactants dispensed from the top electrodeand showerhead in a deposition chamber recombine along the interfacebetween the plasma edge and chamber ambient to form dielectricdeposition fence 3014 on outer region 3009 of carrier ring 3006. Outerregion 3009 of the carrier ring 3006 where the deposition fence 3014forms is recessed with respect to region 3008 so that the distance fromthe top of the deposition fence 3014 to the robot slider 3018 isincreased. This increased distance, permits more wafers to be processedbetween plasma chamber cleans or openings thus increasing the time toprocess product wafers and reducing manufacturing cost.

Top down and side views of a typical carrier ring 4000 are shown inFIGS. 4A and 4B. As shown in FIG. 4B the typical carrier ring 4000 has acenter recess region 4004 in which the wafer rests, which is surroundedby region 4002. Region 4002 is of a uniform thickness 4018 out to theedge of the carrier ring. Thickness 4018 of region 4002 exceeds thethickness of center recess region 4004 by the thickness of wafers to betransported by carrier ring 4000.

A top down and side view of a carrier ring 5000 according to anembodiment which addresses the deposition fence problem are shown inFIGS. 5A and 5B. As shown in FIG. 5B, carrier ring 5000 has a centerrecess region 5004 in which the wafer rests. Center recess region 5004is surrounded by region 5002, which has a thickness that exceeds thethickness of center recess region 5004 by the thickness of wafers to betransported by carrier ring 5000. Carrier ring 5000 also has an outerportion 5006 where a deposition fence may form. Outer portion 5006 isrecessed with respect to region 5002 to provide an increased distancebetween a deposition fence that forms in this area and a robot sliderarm that transports a wafer into and out of the deposition chamber ortransports the carrier ring plus the wafer from one deposition stationto the next.

In an example embodiment, the multi-station deposition chamber is aNovellus Vector deposition chamber for the deposition of organo-silicateglass (OSG). As shown in FIG. 5B an outer portion of the wafer carrierring 5006 is recessed. The ring recess 5006 may be in the range of 0.5to 0.8 inches wide and 0.03 to 0.06 inches deep. In a preferredembodiment the ring recess is about 0.6+/−0.005 inches wide and about0.0425+/−0.005 inches deep. Using the preferred embodiment, the ratio ofthe number of wafers able to be processed using a wafer carrier ringwith the preferred embodiment recess to the number of wafers able to beprocessed without a recess prior to a chamber clean is approximately1.6. This 60% increase in the number of wafers processed between chambercleans may significantly reduce manufacturing cost.

Although the example embodiment used for illustration is a NovellusVector, other Novellus PECVD deposition equipment may also benefit. Inaddition, other multi-station deposition tools and other single wafer,single station deposition tools may benefit. Although the exampleembodiment used for illustration is an OSG dielectric deposition, otherfilms that are deposited with a pressure greater than about 12 Torr andmay form deposition fences may also benefit.

While various embodiments of the present invention have been describedabove, it should be understood that they have been presented by way ofexample only and not limitation. Numerous changes to the disclosedembodiments can be made in accordance with the disclosure herein withoutdeparting from the spirit or scope of the invention. Thus, the breadthand scope of the present invention should not be limited by any of theabove described embodiments. Rather, the scope of the invention shouldbe defined in accordance with the following claims and theirequivalents.

1. A PECVD deposition chamber, comprising: a circular wafer pedestalwith a top surface diameter larger than a wafer diameter and with anouter recessed portion of said top surface where said recessed portionis outside said wafer diameter and where said recessed portion underliesan interface between a plasma edge and chamber ambient in said PECVDdeposition chamber.
 2. The chamber of claim 1 where said circular waferpedestal further comprises a wafer carrier ring and where said outerrecessed portion is the outer portion of said wafer carrier ring.
 3. Thechamber of claim 2 where a width of said outer recessed portion is inthe range of 0.5 to 0.8 inches and a depth of said outer recessedportion is in the range of 0.03 to 0.06 inches.
 4. The chamber of claim3 where said width is about 0.6+/−0.005 inches and said depth is about0.0425+/−0.005 inches.
 5. The chamber of claim 1 where a pressure duringa deposition in said PECVD deposition chamber is greater than 12 Torr.6. The chamber of claim 1 where a deposition in said PECVD depositionchamber is an OSG deposition.
 7. A PECVD deposition chamber, comprising:a wafer carrier ring with a recessed portion on the outer top side ofsaid wafer carrier ring and where said recessed portion underlies aninterface between a plasma edge and chamber ambient in said PECVDdeposition chamber.
 8. The chamber of claim 7 where a width of saidrecessed portion is in the range of 0.5 to 0.8 inches and a depth ofsaid recessed portion is in the range of 0.03 to 0.06 inches.
 9. Thechamber of claim 8 where said width is about 0.6+/−0.005 inches and saiddepth is about 0.0425+/−0.005 inches.
 10. The chamber of claim 7 where apressure during a deposition in said PECVD deposition chamber is greaterthan 12 Torr.
 11. The chamber of claim 7 where a deposition in saidPECVD deposition chamber is an OSG deposition.